The QS1R VERB is manufactured in Columbus, Ohio, USA by Software Radio Laboratory LLC. 
External Links
Directory
SRL QS1R Features
- LTC2208 16 bit, 130 MSPS analog to digital converter (ADC)
- Altera Cyclone III EP3C16 FPGA
- Cypress CY7C68013A USB 2.0 Microcontroller
- I2C expansion bus
- SPI expansion bus
- RF expansion "VERB Bus"
- Open source firmware for "FX2" microcontroller
- Open source verilog for Cyclone III DDC
- Open source software - SDRMAX-win, SDRMAX-linux
- Firmware, verilog, and software user updatable via web download
- Secure Digital (SD) card connector for configuration memory
- TI PCM1771 24 bit DAC for optional audio output
- 125 MHz LVDS output
- Low pass filtered (55 MHz) BNC input
- Direct input (15 kHz - 300 MHz) via SMA connector
- Direct input (15 kHz - 300 MHz) via RF expansion bus
- External encode clock (ADC clock) input via SMA connector
- Ultra low noise clock included as standard
- 160 x 100 mm (6.299" x 3.940") L x W
- Fused and reverse polarity protected 2.5 mm DC power input
- Power and ADC clipping LED indicators
- Four user programmable "debug" LEDs
- Wide range DC input 5 - 12 VDC, 500 mA
QS1R Possible Uses
- Spectrum Analysis
- General Purpose ADC board w/ up to 4 MHz BW
- Software Defined Receiver
- Short Wave Listening (SWL)
- Amateur Radio HF Receiver
- Amateur Radio IF Receiver
- Panoramic Adapter for Communication Receivers (Any IF)
- FPGA based SDR Development Platform
- Ultrasound Receiver
- Radio Astronomy
- VLF Experimentation
- SDR Education
QS1R Specifications (Standard VERB*)
- Frequency Range (BNC LPF Input): 15 kHz to 55 MHz- Frequency Range (SMA direct input): 15 kHz to 300 MHz
- Input Impedance: 50 ohms
- Clipping RF Level: +9 dBm
- Maximum Display Bandwidth: 4 MHz
- ADC Sampling Clock: 125 MHz (1 - 130 MHz with external encode input)
- I/Q Image Rejection: 90+ dB
- MDS (500 Hz): -122 dBm @ 14 MHz
- BDR: 125 dB
- Voltage: 5 - 12 VDC, 2A fused, reverse polarity protected
- Current Draw: 500 mA (typ.)
- Connectors: BNC (RF IN LPF), SMA (RF IN, EXT ENCODE CLOCK), USB Type "B", 2.5 mm DC Power
- LEDS: Power, Clipping, Debug (internal)
- Dimensions: 160 x 100 mm (3.299" x 3.940") (board size)
*custom modifications are available, please contact factory
QS1R Planned Add-on Boards
- Bandpass and RF Amp-Attenuator board
- QS1T Direct Up-conversion (DUC) Transmitter Add-on board
- VHF/UHF/Microwave Expansion boards
- Vector Network Analyzer (VNA) Add-on
- Digital Oscilloscope and Spectrum Analyzer Add-on
- Universal Control I/O Board
- 60 - 300 MHz Undersampling Adapter
SDRMAX-win Software
SDRMAXII is the companion
open source software for use with the QS1R VERB. SDRMAX-win compiles with the free Microsoft
Visual C# Express 2008 IDE. The latest source code
for SDRMAXII will be always available via SVN server.
For a screenshot of the SDRMAXII software click here.
(QS1R VERB, Ultra Low Noise Clock, USB Cable, DC Adapter [100-125 VAC, 60 Hz])
Options:
Credit Cards Accepted Through Paypal
Shipping, Insurance, and Handling:
For a screenshot of the SDRMAXII software click here.
QS1R Order Information and Pricing
QS1R VERB (standard) - $849 + S&H USD(QS1R VERB, Ultra Low Noise Clock, USB Cable, DC Adapter [100-125 VAC, 60 Hz])
Options:
- ENCL: Extruded Aluminum Black Anodized Case - $75
- EDCPA: Euro DC power adapter [90-264VAC, 50 Hz] - $25 USD
Shipping, Insurance, and Handling:
- USA - $20 USD
- Mexico & Canada - $40 USD
- International - $60 USD
Purchasing and Payment Options
- Individuals (US, International) – Credit Card via PayPal, checks, money orders.
- Organizations (commercial, government, academic) – Credit Card via PayPal, purchase orders.
- contact us for payment option details